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 PD - 91349C
IRL530NS/L
HEXFET(R) Power MOSFET
Advanced Process Technology l Surface Mount (IRL530NS) l Low-profile through-hole (IRL530NL) l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated Description
l
D
VDSS =100V
G11 S
RDS(on) = 0.10 ID = 17A
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL530NL) is available for lowprofile applications.
D 2 P ak
T O -26 2
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
17 12 60 3.8 79 0.53 20 150 9.0 7.9 5.0 -55 to + 175 300 (1.6mm from case )
Units
A W W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
--- ---
Max.
1.9 40
Units
C/W
1/09/04
IRL530NS/L
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss
Min. 100 --- --- --- --- 1.0 7.7 --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. --- 0.122 --- --- --- --- --- --- --- --- --- --- --- --- 7.2 53 30 26
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.100 VGS = 10V, ID = 9.0A 0.120 VGS = 5.0V, ID = 9.0A 0.150 VGS = 4.0V, ID = 8.0A 2.0 V VDS = VGS, ID = 250A --- S VDS = 50V, ID = 9.0A 25 VDS = 100V, VGS = 0V A 250 VDS = 80V, VGS = 0V, TJ = 150C 100 VGS = 16V nA -100 VGS = -16V 34 ID = 9.0A 4.8 nC VDS = 80V 20 VGS = 5.0V, See Fig. 6 and 13 --- VDD = 50V --- ID = 9.0A ns --- RG = 6.0, VGS = 5.0V --- RD = 5.5, See Fig. 10 Between lead, 7.5 --- nH and center of die contact 800 --- VGS = 0V 160 --- pF VDS = 25V 90 --- = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 17 showing the A G integral reverse --- --- 60 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 9.0A, VGS = 0V --- 140 210 ns TJ = 25C, IF = 9.0A --- 740 1100 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%.
Uses IRL530N data and test conditions
Starting TJ = 25C, L = 3.7mH
RG = 25, IAS = 9.0A. (See Figure 12)
ISD 9.0A, di/dt 540A/s, VDD V(BR)DSS,
TJ 175C ** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended soldering techniques refer to application note #AN-994.
IRL530NS/L
100
TOP VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V
100
ID , Drain-to-Source Current (A )
10
ID , Drain-to-Source Current (A )
VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP
10
2.5 V
1
1
2 .5V 2 0 s P U LS E W ID TH T J = 2 5C
0.1 1 10
0.1
100
A
0.1 0.1 1
2 0 s P U LS E W ID TH T J = 1 75 C
10
100
A
V D S , D rain-to-S ource V oltage (V )
V D S , D rain-to-S ource V oltage (V )
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.0
T J = 2 5 C
R D S (on) , D ra in-to -S o urc e O n R e s is ta nc e (N o rm alize d)
I D = 15 A
I D , D ra in -to-S ourc e C urrent (A)
2.5
T J = 1 7 5C
10
2.0
1.5
1
1.0
0.5
0.1 2 3 4 5 6
V DS = 5 0V 2 0 s P U L S E W ID TH
7 8 9 10
A
0.0 -60 -40 -20 0 20 40 60 80
V G S = 1 0V
100 120 140 160 180
A
V G S , G ate-to -So urce Voltag e (V)
T J , J unc tion T em perature (C )
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
IRL530NS/L
1400
1200
C , Capacitance (pF)
1000
C iss
V G S , G ate-to-S ource V oltage (V )
V GS C iss C rs s C o ss
= = = =
0V , f = 1MHz C g s + C g d , C d s S H O R TE D C gd C ds + C g d
15
I D = 9.0 A V D S = 8 0V V D S = 5 0V V D S = 2 0V
12
800
9
600
C oss
400
6
C rss
200
3
0 1 10 100
A
0 0 10 20
FO R TE S T C IR C U IT S E E FIG U R E 1 3
30 40 50
A
V D S , D rain-to-S ourc e V oltage (V )
Q G , T otal G ate C harge (nC )
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000
I S D , R everse Drain C urrent (A )
O P E R A T IO N IN T H IS A R E A LIM IT E D B Y R D S (o n )
T J = 17 5C
I D , D rain Current (A )
100
10
10 s
T J = 2 5C
10
10 0s
1 0.4 0.6 0.8 1.0
V G S = 0V
1.2
A
1 1
T C = 25 C T J = 17 5C S ing le P u lse
10
1m s 10m s 100
A
1000
1.4
V S D , S ourc e-to-D rain V oltage (V )
V D S , D rain-to-S ource V oltage (V )
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
IRL530NS/L
20
VDS VGS
RD
I D , Drain Current (A)
15
D.U.T.
+
RG
- VDD
5.0V
10
Pulse Width 1 s Duty Factor 0.1 %
5
Fig 10a. Switching Time Test Circuit
VDS 90%
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1
D = 0.50 0.20 0.10 0.05 P DM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.1
0.02 0.01
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRL530NS/L
VDS D.U.T. RG + V - DD
5.0 V
E A S , S ingle Pulse Avalanc he E nergy (m J)
L
350
TO P
300
BOTTOM
250
ID 3 .7A 6 .4A 9.0 A
IAS tp
0.01
200
150
Fig 12a. Unclamped Inductive Test Circuit
100
50
V(BR)DSS tp VDD VDS
0
V D D = 25 V
25 50 75 100 125 150
A
175
S tarting T J , J unc tion T em perature (C )
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
5.0 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
IRL530NS/L
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
IRL530NS/L
D2Pak Package Outline
D2Pak Part Marking Information
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For GB Production
Q6SUAIVH7@S A$"T 96U@A8P9@ @6SAA2A! X@@FA! GDI@AG Q6SUAIVH7@S A$"T 96U@A8P9@
UCDTADTA6IADSA$"TAXDUC GPUA8P9@A'!# 6TT@H7G@9APIAXXA!A! DIAUC@A6TT@H7GAGDI@AAGA
DIU@SI6UDPI6G S@8UDAD@S GPBP GPUA8P9@
2- COLLECTOR IGBT 1- GATE
S @ 7 H V I A U S 6 Q
@ 9 P 8 A @ U 6 9
& ( ( A 2 A & A S 6 @
( A F @ @ X
8 A @ DI G
TO-262 Part Marking Information
G 6 I P D U 6 I S @ U DI
S D@ DA U 8 @ S & ( ( A ( A X X A I P A 9 @ G 7 H @ T T 6 G " " G DS A I 6 A T D A DT C U ) @ G Q H 6 Y @ ( ' & A @ 9 P 8 A U P G
P B P G
G 7 H @ T T 6
@ 9 P 8 A U P G
TO-262 Package Outline
IRL530NS/L
A 8 A A @ DI G A G 7 H @ T T 6 A @ C U A DI
IRL530NS/L
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059)
0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
30.40 (1.197) MAX.
26.40 (1.039) 24.40 (.961) 3
4
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 01/04


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